Multi-Stage Network Processor for an Independent HVDC grids Supervisory Control

This thesis presents a Multi-Stage Network Processor as part of independentsupervisory control in HVDC grid connecting AC areas.The proposed Network Processor finds the topology of the grid building the AdjacencyMatrix, identifies islands and assigns DC slack bus. The approach consists of twolevels:...

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Main Author: Tonti, Alessio
Format: Others
Language:English
Published: KTH, Industriella informations- och styrsystem 2015
Online Access:http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-175791
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spelling ndltd-UPSALLA1-oai-DiVA.org-kth-1757912015-10-22T04:45:13ZMulti-Stage Network Processor for an Independent HVDC grids Supervisory ControlengTonti, AlessioKTH, Industriella informations- och styrsystem2015This thesis presents a Multi-Stage Network Processor as part of independentsupervisory control in HVDC grid connecting AC areas.The proposed Network Processor finds the topology of the grid building the AdjacencyMatrix, identifies islands and assigns DC slack bus. The approach consists of twolevels: 1) process of DC substation topology locally and 2) the secondary process atHVDC grid central supervisory controller.At the substation level, the Local Processor determines the branch/bus model of thesubstation including the possible standalone HVDC converters using breakers’ status.Substation Matrix holds information regarding the model of the part of substationconnected to DC grid, while Standing Alone Matrix is created when the converter inthe substation is not connected to DC grid. The same analysis is performed on all thesubstations locally and then the Substation Matrixes are sent to the Central Processorat SCADA level.At central level, the processor creates the global Adjacency Matrix for the wholeHVDC grid.For the islands detection, the corresponding Laplacian Matrix is built from theAdjacency Matrix and a clustering method is used to analyze eigenvectors of theLaplacian Matrix.The proposed Network Processor has been successfully tested using a 7-terminalsHVDC grid model.Besides, an extended version of current algorithm has been studied for the integratedand, with some restriction, for the distributed HVDC supervisory control architecture. This master thesis project has been completely studied and developed at the departmentof Industrial Information and Control Systems at KTH - Royal Institute of Technologyin Stockholm. Student thesisinfo:eu-repo/semantics/bachelorThesistexthttp://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-175791application/pdfinfo:eu-repo/semantics/openAccess
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language English
format Others
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description This thesis presents a Multi-Stage Network Processor as part of independentsupervisory control in HVDC grid connecting AC areas.The proposed Network Processor finds the topology of the grid building the AdjacencyMatrix, identifies islands and assigns DC slack bus. The approach consists of twolevels: 1) process of DC substation topology locally and 2) the secondary process atHVDC grid central supervisory controller.At the substation level, the Local Processor determines the branch/bus model of thesubstation including the possible standalone HVDC converters using breakers’ status.Substation Matrix holds information regarding the model of the part of substationconnected to DC grid, while Standing Alone Matrix is created when the converter inthe substation is not connected to DC grid. The same analysis is performed on all thesubstations locally and then the Substation Matrixes are sent to the Central Processorat SCADA level.At central level, the processor creates the global Adjacency Matrix for the wholeHVDC grid.For the islands detection, the corresponding Laplacian Matrix is built from theAdjacency Matrix and a clustering method is used to analyze eigenvectors of theLaplacian Matrix.The proposed Network Processor has been successfully tested using a 7-terminalsHVDC grid model.Besides, an extended version of current algorithm has been studied for the integratedand, with some restriction, for the distributed HVDC supervisory control architecture. This master thesis project has been completely studied and developed at the departmentof Industrial Information and Control Systems at KTH - Royal Institute of Technologyin Stockholm.
author Tonti, Alessio
spellingShingle Tonti, Alessio
Multi-Stage Network Processor for an Independent HVDC grids Supervisory Control
author_facet Tonti, Alessio
author_sort Tonti, Alessio
title Multi-Stage Network Processor for an Independent HVDC grids Supervisory Control
title_short Multi-Stage Network Processor for an Independent HVDC grids Supervisory Control
title_full Multi-Stage Network Processor for an Independent HVDC grids Supervisory Control
title_fullStr Multi-Stage Network Processor for an Independent HVDC grids Supervisory Control
title_full_unstemmed Multi-Stage Network Processor for an Independent HVDC grids Supervisory Control
title_sort multi-stage network processor for an independent hvdc grids supervisory control
publisher KTH, Industriella informations- och styrsystem
publishDate 2015
url http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-175791
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