Energy Efficiency of Computation in All-spin Logic: Projections and Fundamental Limits
Built with nanomagnets, a spintronic device called the all-spin logic (ASL) device carries information with only spin currents, resulting in a low power supply--10 mV. This voltage is 100 times smaller than the conventional CMOS devices (usually 0.8~1V). The potential for improved energy efficiency...
Main Author: | Chen, Zongya |
---|---|
Format: | Others |
Published: |
ScholarWorks@UMass Amherst
2019
|
Subjects: | |
Online Access: | https://scholarworks.umass.edu/masters_theses_2/754 https://scholarworks.umass.edu/cgi/viewcontent.cgi?article=1779&context=masters_theses_2 |
Similar Items
-
Energy/Delay Tradeoffs in All-Spin Logic Circuits
by: Zhaoxin Liang, et al.
Published: (2016-01-01) -
Circuit Simulation of All-Spin Logic
by: Alawein, Meshal
Published: (2016) -
Study on Electrical Generation and Manipulation of Spin Current in n-type Si Spin MOSFET
by: Lee, Soobeom
Published: (2021) -
Differential Electrically Insulated Magnetoelectric Spin-Orbit Logic Circuits
by: Hai Li, et al.
Published: (2021-01-01) -
Electrical-Spin Transduction for CMOS-Spintronic Interface and Long-Range Interconnects
by: Rouhollah Mousavi Iraei, et al.
Published: (2017-01-01)