A simple proof checker for real-time systems
This thesis presents a practical approach to verifying real-time properties of V L S I designs. A simple proof checker with built-in decision procedures for linear programming and predicate calculus offers a pragmatic approach to verifying real-time systems in return for a slight loss of formal r...
Main Author: | Leung, Catherine |
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Format: | Others |
Language: | English |
Published: |
2009
|
Online Access: | http://hdl.handle.net/2429/3826 |
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