Evaporated silicon thin-film transistors

• Main Author: Salama, Clement Andre Tewfik
• Language: English
• Published: University of British Columbia 2011
• Subjects: Silicon; Transistors
• Online Access: http://hdl.handle.net/2429/37213

The method of fabrication, the theory and the properties of evaporated silicon thin-film transistors are discussed. The device consists of a p-type silicon film (0.5 to 2µ thick) on a sapphire substrate, with aluminum source-drain electrodes evaporated onto the silicon and followed by a silicon oxide, SiOx , insulating layer and an aluminum gate. The device operates by field-effect conductivity modulation of an n-type inversion layer at the surface of the p-type film. The silicon films were evaporated by electron beam heating in a typical vacuum of 7 x 10⁻⁷ mm Hg at a rate of 200-600 Å/min. The films exhibited single crystal diffraction patterns when deposited at a substrate temperature in the range 1050°C to 1100°C. They were found to be high resistivity ( > 400 Ω -cm) p-type and the hole mobility was of the order of 20-30 cm² /volt-sec. The minority carrier lifetime, was 1-2 µsec and the optical absorption edge of the films was found to be broader than the absorption edge of single crystal silicon at all substrate temperatures. The low carrier mobility and minority carrier lifetime as well as the broadening of the optical absorption edge are attributed to the presence of a large number of crystallographic defects in the films. The effective surface state density at the Si/ evaporated SiOx interface was estimated by the MOS technique and was found to be of the same order of magnitude (3 - 4 x 10¹¹ cm⁻² ) as that at the Si/thermally grown SiO₂ interface. The silicon surface potential in the MOS structure was found to be particularly susceptible to water vapour and contamination by sodium. The silicon thin-film transistors fabricated have typical effective mobilities of 5-10 cm² /volt-sec with transconductances as high as 100 µmho and gain-bandwidth products up to 1 MHz. Surface trapping was found to affect the behavior of the devices at low gate voltages. The characterization of the traps by a method which involves measurements of the source-drain conductance, its temperature dependence and its transient response is discussed. The effect of surface scattering on the mobility at high gate voltages is also considered. The device characteristics were stable in vacuum but drifted when exposed to the atmosphere. === Applied Science, Faculty of === Electrical and Computer Engineering, Department of === Graduate