A real-time system for multi-transputer systems

Two important problems namely a versatile, efficient communication system and allocation of processors to processes are analysed. An efficient communication system has been developed, in which a central controller, the bus-master, dynamically configures the point-to-point network formed by the lin...

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Bibliographic Details
Main Author: Chadha, Sanjay
Language:English
Published: University of British Columbia 2010
Subjects:
Online Access:http://hdl.handle.net/2429/29465
Description
Summary:Two important problems namely a versatile, efficient communication system and allocation of processors to processes are analysed. An efficient communication system has been developed, in which a central controller, the bus-master, dynamically configures the point-to-point network formed by the links of the transputers. The links are used to form a point-to-point network. An identical kernel resides on each of the nodes. This kernel is responsible for all communications on behalf of the user processes. It makes ConnectLink and ReleaseLink requests to the central controller and when the connections are made it sends the the messages through the connected link to the destination node. If direct connection to the destination node cannot be made then the message is sent to an intermediate node, the message hops through intermediate nodes until it reaches the destination node. The communication system developed provides low latency communication facility, and the system can easily be expanded to include a large number of transputers without increasing interprocess communication overhead by great extent. Another problem, namely the Module Assignment Problem (MAP) is an important issue at the time of development of distributed systems. MAPs are computationally intractable, i.e. the computational requirement grows with power of the number of tasks to be assigned. The load of a distributed system depends on both module execution times, and intermodule communication cost (IMC). If assignment is not done with due consideration, a module assignment can cause computer saturation. Therefore a good assignment should balance the processing load among the processors and generate minimum inter-processor communication (IPC) ( communication between modules not residing on the same processor). Since meeting the deadline constraint is the most important performance measure for RTDPS, meeting the response time is the most important criteria for module assignment. Understanding this we have devised a scheme which assigns processes to processors such that both response time constraints and periodicity constraints are met. If such an assignment is not possible, assignment would fail and an error would be generated. Our assignment algorithm does not take into consideration factors such as load balancing. We believe that the most important factor for RTDPS is meeting the deadline constraints and that's what our algorithm accomplishes. === Applied Science, Faculty of === Electrical and Computer Engineering, Department of === Graduate