Application of generalized power-delay metrics to supply and threshold selection in deep submicron CMOS
Power consumption has become as important as performance in todays deep submicron designs. As a result, high-level techniques and models must be developed to evaluate design changes in terms of power (energy) and performance tradeoff early in the design process. Recently, designers have been usin...
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| Language: | English |
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2009
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| Online Access: | http://hdl.handle.net/2429/16704 |