Design and implementation of a high-speed data logging facility for a dual DSP system
This thesis has two main components: implementation and system evaluation. In the implementation phase, we port an existing real-time operating system, called ORTS, from a single processor version to a multiprocessor version, and integrate a DMA mechanism for data transfers, which has never been...
Main Author: | Yedid Barba, Erika |
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Format: | Others |
Language: | English |
Published: |
2009
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Online Access: | http://hdl.handle.net/2429/12279 |
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