| Summary: | MAPPING AND OPTIMIZING A SOFTWARE-ONLY REAL-TIME Due to its high computational demand, MPEG-2 video coding solutions have been based
mainly on custom hardware (ASIC) systems. Such systems lack the flexibility and adaptability of
software-based solutions. Achieving real-time MPEG-2 video encoding in software remains to
be a major challenge. A typical MPEG-2 encoder performs 20 to 30 GOPS (giga operations per
second), which exceeds the capabilities of the most advanced contemporary processors.
In this thesis, we have developed and tested a highly optimized, low complexity, highquality
MPEG-2 video encoder software based on Texas Instruments' fixed-point TMS320C6201
VLiW (Very Long Instruction Word) processor. First, we developed MPEG-2 video encoder
software written in C for the C62x processor platform, however, due to the difference in the
processor architecture, optimization and modification are done on the software to ensure the
MPEG-2 video encoder runs efficiently in the VLIW architecture. The optimization are done at
the assembly language level to maximize the attainable instruction-level parallelism (ILP) of the
C62x VLIW architecture. In our experience, optimizations done alone by the optimizing Ccompiler
of the C62x could not meet the real-time requirements of MPEG-2. After code remapping
and optimization, the resulting MPEG-2 video encoder implementation runs
approximately 32 times faster than the original unoptimized MPEG-2 video encoder. Moreover,
the current version of the encoder can handle SIF(320x240) video format at 16 frames per second
with both I and P pictures, and CCIR-601 (720x480) at 15 frames per second for the I pictures
only. Our real-time MPEG-2 encoder has been implemented and tested on the C62x Evaluation
Model (EVM) board from TI. === Applied Science, Faculty of === Electrical and Computer Engineering, Department of === Graduate
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