Programmable Integral / Fractional Clock Synthesizer based on Multi-phase DLL

Programmable Integral / Fractional Clock Synthesizer based on Multi-phase DLL

碩士 === 國立雲林科技大學 === 電機工程系 === 107 === With the evolution of technology and the continuous improvement of the process, operating clock speed is also an important parameter to determine the digital synchronization system, In order to integrate more features, clock synthesizers are widely used in the s...

Full description

Bibliographic Details
Main Authors:	WEI, SHI-JIE, 魏士傑
Other Authors:	HWANG, CHORNG-SII
Format:	Others
Language:	zh-TW
Published:	2019
Online Access:	http://ndltd.ncl.edu.tw/handle/zryj84

Similar Items

Programmable Clock Synthesizer based on Multi-phase DLL
by: Chi-Tuan Ke, et al.
Published: (2017)

DLL-based Programmable Clock Synthesizer
by: Jhu, Siang-He, et al.
Published: (2016)

Design of an All-Digital Programmable DLL-Based Frequency Synthesizer
by: Shih-Nung Wei, et al.
Published: (2010)

A CMOS DLL-Based Programmable Clock Generator
by: Jian-Hong Shen, et al.
Published: (2005)

Programmable Integral / Fractional Clock Synthesizer
by: Jyung-Sin Jiang, et al.
Published: (2014)

An All-Digital DLL-Based Clock Generator
by: Wei-chieh Chen, et al.
Published: (2011)

Design and Application of CMOS DLL in Clock Synthesizers and Time-to-Digital Converters
by: Chorng-Sii Hwang, et al.
Published: (2004)

Programmable Integral / Fractional Clock Synthesizer based on Delay-Locked Loop
by: Jhen-Yu Du, et al.
Published: (2012)

Automatic DLL-Based Clock Synchronization Scheme for Multi-Die ICs
by: Cheng, Chia-Yuan, et al.
Published: (2018)

An Analog-to-Digital Converter with DLL Clock Generator
by: Yi-Pei Su, et al.
Published: (2006)

The Realization of Clock Recovery Circuit with DLL and PLL
by: Chua-hua Lee, et al.
Published: (1999)

DLL-based 4-phase duty-cycle and phase correction circuit for high frequency clock tree
by: Song Jaewoo, et al.
Published: (2016-01-01)

Programmable DLL-based Frequency Multiplier and A ROM-less Direct Digital Frequency Synthesizer
by: Hsien-Chih She, et al.
Published: (2002)

A Multiphase and a De-skew Clock Generator based on DLL
by: Kevin Fong, et al.
Published: (2010)

1-4GHz DLL-Based High Speed Clock Generator
by: Chu, Shao-Cheng, et al.
Published: (2014)

Design and Analysis of A DLL-based Clock Generator for Dynamic Frequency Scaling
by: Feng-Hsiang Chiu, et al.
Published: (2008)

Design and Implementation of All-Digital Fast-Locked DLL-Based Clock Generators
by: Chuan-Kang Liang, et al.
Published: (2006)

A High Speed DLL-Based Clock Generator With High Multiplication Ratio
by: Sheng Huai Cheng, et al.
Published: (2015)

A Wide-Range Multi-Phase DLL with phase insertion architecture
by: Bing-Feng Lin, et al.
Published: (2010)

Dual Bit-Rate Burst-Mode Clock and Data Recovery Circuit based on DLL
by: Fu-kai Tu, et al.
Published: (2013)

An Area-Efficient DLL-Based Fractional-N Frequency Synthesizer with Periodic Reuse of a Delay Cell Scheme
by: Cheng-Shiue Yang, et al.
Published: (2019)

Programmable Clock Synthesizer based on Delay-Locked Loop
by: Jyun-Hong Chen, et al.
Published: (2010)

Analysis and Design of DLL-Based Frequency Synthesizers for Ultra-Wideband Communication
by: Ojani, Amin
Published: (2014)

A 100MHz-1.6GHz DLL-Based Clock Generator with Switching Glitch and Static Phase Error Reduction Function
by: Lu, Bing-Hsun, et al.
Published: (2009)

An All-Digital Wide Power Supply Range And Wide Frequency Range DLL-Based clock Generator
by: Chang, Yi-Ming, et al.
Published: (2009)

Frequency Multiplier Based on DLL Technique
by: De. Wei. Liu, et al.
Published: (2008)

Signature Generation for DLL-based Malware
by: Chen, Wei-Chih, et al.
Published: (2013)

A DLL-based Pulsewidth Control Loop With Phase Error Corrector
by: PIN-CHENG CHIU, et al.
Published: (2011)

Design of a DLL-based Frequency Multiplier
by: Wei-Syun Yu, et al.
Published: (2010)

Single event transient modeling and mitigation techniques for mixed-signal delay locked loop (DLL) and clock circuits
by: Maillard, Pierre
Published: (2014)

480 MHz 10-tap Clock Generator Using Edge-Combiner DLL for USB 2.0 Applications
by: Takashi Kawamoto, et al.
Published: (2012-01-01)

Design and Implementation of DLL-based PWM for Envelope Modulation of Polar Transmitters
by: Yu-chieh Ma, et al.
Published: (2014)

PLL Based Multi-Phases Clock Generator
by: Jyun-Huo Haung, et al.
Published: (2005)

A Spread Spectrum Clock Generator Based on a Fractional-N Frequency Synthesizer
by: Ding-Shiuan Shen, et al.
Published: (2007)

Context-Dependent Functional Divergence of the Notch Ligands DLL1 and DLL4 In Vivo.
by: Kristina Preuße, et al.
Published: (2015-06-01)

A Glitch-Free and Low-Power DLL-Based Clock Generator Using a Feedback Switching Detector for Power Management Systems
by: 林鼎國
Published: (2010)

Defending DLL Injection in Runtime
by: Jhih-Syong Long, et al.
Published: (2019)

Distinct expression patterns of Notch ligands, Dll1 and Dll4, in normal and inflamed mice intestine
by: Hiromichi Shimizu, et al.
Published: (2014-05-01)

A 3-600 MHz All Digital Multi-Phase DLL with DNL and INL ±0.015 LSB Phase Step Error
by: Kang Hung Liao, et al.
Published: (2016)

Design and Analysis of Multiphase DLL-based Frequency Multipliers
by: Shu-Ming Chang, et al.
Published: (2005)