Hysteresis-Controlled Buck Converters with Phase-Frequency-Locked Techniques and New Active Integral Current-Sensing Techniques

• Main Authors: HSIEH, CHENG-PU, 謝承溥
• Other Authors: CHEN, JIANN-JONG
• Format: Others
• Language: zh-TW
• Published: 2019
• Online Access: http://ndltd.ncl.edu.tw/handle/wb59cw

碩士 === 國立臺北科技大學 === 電子工程系 === 107 === The first chip is a hysteresis-controlled buck converters with phase-frequency-locked techniques and new active integral current-sensing techniques. Using the switching converter, the circuit efficiency is higher than that of a conventional power converter, and a phase-locked frequency-locked circuit is added to allow the circuit to fix the switching frequency even when the load is switched. This chip has been fabricated with TSMC 0.35µm CMOS processes and the chip area is 1.5× 1.5 mm2. The switching frequency is 1 MHz, the input voltage range is 3 V to 3.6 V, the output voltage range is 1.5 V to 2.5 V, the maximum load current is 500 mA, and the maximum static efficiency is 89.4%. The second chip is a low-ripple output hysteresis-controlled buck converters with phase-frequency-locked techniques and new active integral current-sensing techniques. The control mode uses the hysteresis voltage controlled technology which used in the previous part to achieve fast transient response. In order to solve the hysteresis control method, the switching frequency cannot be fixed. Therefore, the phase-locked frequency-locked loop is added to make the circuit applicable. Under different conditions, and by improving the bandwidth of the amplifier, the overall circuit can operate at higher frequency. This chip has been fabricated with TSMC 0.35µm CMOS process and the chip area is 1.5 × 1.5 mm2. The switching frequency is 3 MHz. The range of input voltage is from 3 V to 3.6 V. The range of output voltage is from 1.5 V to 2.5 V. The maximum load current is 500 mA. The maximum efficiency is 80.8%.