Energy-Efficient One-Dimension Winograd’s Minimal Filter Algorithm for Deep Convolutional Neural Networks based on FPGA
碩士 === 國立臺灣科技大學 === 電子工程系 === 107 === The state-of-the-art convolutional neural networks (CNNs) have been widely applied to many deep neural networks (DNNs) models. As the model becomes more accurate, both the number of computation and the data bandwidth are significantly increased. This paper pres...
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ndltd-TW-107NTUS54271462019-10-24T05:20:28Z http://ndltd.ncl.edu.tw/handle/ywnysv Energy-Efficient One-Dimension Winograd’s Minimal Filter Algorithm for Deep Convolutional Neural Networks based on FPGA 基於FPGA之深度卷積神經網路之高能效威諾格拉德一維最小化濾波器演算法 WEN-JIE LI 李文傑 碩士 國立臺灣科技大學 電子工程系 107 The state-of-the-art convolutional neural networks (CNNs) have been widely applied to many deep neural networks (DNNs) models. As the model becomes more accurate, both the number of computation and the data bandwidth are significantly increased. This paper presents the design and implementation of CNN accelerator based on FPGA. The proposed design uses the row stationary with the NoC and the fast convolution algorithm in process elements to reduce the number of computation and data bandwidth simultaneously. The experimental result which using the CNN layers of VGG-16 with a batch size of three shows that the proposed design is more energy efficient than the state-of-the-art work. The proposed design improves the total GOPs of the algorithm by 1.50 times and reduces the on-chip memory and off-chip memory bandwidth by 1.07 and 1.46 times than prior work respectively. Shanq-Jang Ruan 阮聖彰 2019 學位論文 ; thesis 41 en_US |
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碩士 === 國立臺灣科技大學 === 電子工程系 === 107 === The state-of-the-art convolutional neural networks (CNNs) have been widely applied to many deep neural networks (DNNs) models. As the model becomes more accurate, both the number of computation and the data bandwidth are significantly increased. This paper presents the design and implementation of CNN accelerator based on FPGA. The proposed design uses the row stationary with the NoC and the fast convolution algorithm in process elements to reduce the number of computation and data bandwidth simultaneously. The experimental result which using the CNN layers of VGG-16 with a batch size of three shows that the proposed design is more energy efficient than the state-of-the-art work. The proposed design improves the total GOPs of the algorithm by 1.50 times and reduces the on-chip memory and off-chip memory bandwidth by 1.07 and 1.46 times than prior work respectively.
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Shanq-Jang Ruan |
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Shanq-Jang Ruan WEN-JIE LI 李文傑 |
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WEN-JIE LI 李文傑 |
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WEN-JIE LI 李文傑 Energy-Efficient One-Dimension Winograd’s Minimal Filter Algorithm for Deep Convolutional Neural Networks based on FPGA |
author_sort |
WEN-JIE LI |
title |
Energy-Efficient One-Dimension Winograd’s Minimal Filter Algorithm for Deep Convolutional Neural Networks based on FPGA |
title_short |
Energy-Efficient One-Dimension Winograd’s Minimal Filter Algorithm for Deep Convolutional Neural Networks based on FPGA |
title_full |
Energy-Efficient One-Dimension Winograd’s Minimal Filter Algorithm for Deep Convolutional Neural Networks based on FPGA |
title_fullStr |
Energy-Efficient One-Dimension Winograd’s Minimal Filter Algorithm for Deep Convolutional Neural Networks based on FPGA |
title_full_unstemmed |
Energy-Efficient One-Dimension Winograd’s Minimal Filter Algorithm for Deep Convolutional Neural Networks based on FPGA |
title_sort |
energy-efficient one-dimension winograd’s minimal filter algorithm for deep convolutional neural networks based on fpga |
publishDate |
2019 |
url |
http://ndltd.ncl.edu.tw/handle/ywnysv |
work_keys_str_mv |
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