Energy-Efficient One-Dimension Winograd’s Minimal Filter Algorithm for Deep Convolutional Neural Networks based on FPGA
碩士 === 國立臺灣科技大學 === 電子工程系 === 107 === The state-of-the-art convolutional neural networks (CNNs) have been widely applied to many deep neural networks (DNNs) models. As the model becomes more accurate, both the number of computation and the data bandwidth are significantly increased. This paper pres...
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| Format: | Others |
| Language: | en_US |
| Published: |
2019
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| Online Access: | http://ndltd.ncl.edu.tw/handle/ywnysv |
| Summary: | 碩士 === 國立臺灣科技大學 === 電子工程系 === 107 === The state-of-the-art convolutional neural networks (CNNs) have been widely applied to many deep neural networks (DNNs) models. As the model becomes more accurate, both the number of computation and the data bandwidth are significantly increased. This paper presents the design and implementation of CNN accelerator based on FPGA. The proposed design uses the row stationary with the NoC and the fast convolution algorithm in process elements to reduce the number of computation and data bandwidth simultaneously. The experimental result which using the CNN layers of VGG-16 with a batch size of three shows that the proposed design is more energy efficient than the state-of-the-art work. The proposed design improves the total GOPs of the algorithm by 1.50 times and reduces the on-chip memory and off-chip memory bandwidth by 1.07 and 1.46 times than prior work respectively.
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