| Summary: | 碩士 === 國立臺灣科技大學 === 電子工程系 === 107 === Recently, various frequency synthesizers have been developed with the rapid development of wireless communication systems in which SoC (System on a chip) is the main trend of them. When integrating the sub-circuits in system, there are phase error or clock skew which generate asynchronous phenomenon in different sub-circuit blocks that causing output data error started up. Therefore, we need a Phase-Locked-Loop (PLL) for reducing the phase and clock error to decrease the output data error. In the Frequency synthesizer, its blocks include Phase/Frequency Detector (PFD), Charge Pump (CP), Loop Filter (LF), Voltage Controlled Oscillator (VCO), and Frequency Divider (FD). Among of them, the Voltage Controlled Oscillator and Frequency Divider are the main circuits, so this thesis proposed the design GaN HEMT Injection-Locked Frequency Divider (ILFD), two kind of different CMOS ILFD.
First of all, this thesis uses win semiconductor corp. 0.25 μm GaN HEMT technology to achieve an Injection-Locked Frequency Divider divide-by-2. The ILFD consists of a capacitive cross-coupled pair and an LC-tank consisted of one coupled inductor pair and parasitic capacitor. The inductor part in resonator consists of two mutual inductors, it can make the purpose that coupling a dual-band and it can improve the locking range. With the supply voltage of VDD = 0.9 V, the GaN ILFD current and power consumption are 2.16 mA and 1.944 mW, respectively. Because the GaN HEMT is a power device, the circuit can generate the differential output signals with 5.93 dBm output power at the oscillation frequency 5.129 GHz. At low injection power, the ILFD has two non-overlapped locking range, and at injection power Pinj =0 dBm it has only one locking range from 10.11 to 11.62 GHz. The ILFD with a die area 2×1 mm2.
Secondly, this thesis study using a tsmc 0.18 μm 1P6M CMOS technology to achieve a wide-operation range Injection-Locked Frequency Divider divide-by-2. The ILFD consists of a capacitive cross-coupled pair and an LC-tank consisted of inductors and parasitic capacitor. With different bias voltage range, this ILFD can generate a wide-operation range, where the operation range is from 5 to 12GHz, and the tunning range of oscillation frequency is from 2.5 to 6 GHz. With the supply voltage of VDD = 1 V, the ILFD current and power consumption are 7.5 mA and 7.5 mW, respectively, and at injection power Pinj =0 dBm, the locking range is from 3.8 to 12.7 GHz. The ILFD with a die area 1.06×1.2 mm2.
Finally, this thesis study using a tsmc 0.18 μm 1P6M CMOS technology to achieve a dual-band Injection-Locked Frequency Divider divide-by-2. The ILFD consists of a capacitive cross-coupled pair and an LC-tank consisted of inductors and parasitic capacitor. This ILFD consisted of two sub-ILFDs, and it has two non-overlapped locking range. The locking range of high frequency band is from 11.2 GHz to 14.8 GHz and the locking range of low band is from 1.5 GHz to 7 GHz. In the inductors of the both sub-ILFDs, there are two pairs varactor added, and they can change the oscillation frequency. The ILFD with a die area 0.933×0.993 mm2.
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