| Summary: | 碩士 === 國立臺灣科技大學 === 電子工程系 === 107 === This thesis aims to study and develop a low-power pulse converter and achieve a flat circuit. In this paper, a two-stage series architecture of boost converter and flyback converter is used. The front stage uses current limiting control boost converter and raises the low input voltage to high voltage. The high voltage can increase the storage energy of the two series intermediate capacitor. When the output pulse is pumped, the constant current control is used to limit the input current to maintain the rated current, and most of the energy will be provided by the intermediate stage capacitor; the constant current control allows the design of the power stage components to be designed only at the rated power instead of maxim-um pulse power. The rear stage uses a flyback converter to provide positive and negative voltage outputs, and uses the flyback converter voltage conversion ratio characteristics to achieve a wide range of output voltages. Because the flyback converter has fewer components, at low power or multiple output application, the volume can be minimized; and the planer transformer is used as the transformer of the flyback converter. In addition to considering the flattening of the circuit, the transformer coil arrangement design can obtain a small leakage inductance value, thereby eliminating the need for using the snubber. Finally, a DC input 9~18V, two outputs of positive and negative voltage DC 12~220V, constant voltage and constant current control, and pulse converter with a rated power 11W and maximum pulse power of 70.4W can be realized.
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