Integer Linear Programming Based Substrate Routing Framework for Fine Pitch Ball Grid Array Package
碩士 === 國立臺灣科技大學 === 資訊工程系 === 107 === In advanced very-large-scale integration (VLSI) design, billions of transistors could be fabricated on the same die. Integration circuit (IC) packaging has become one of the most important steps in IC design flow. Fine pitch ball grid array (FBGA) is widely used...
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| Format: | Others |
| Language: | en_US |
| Published: |
2019
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| Online Access: | http://ndltd.ncl.edu.tw/handle/eea4e9 |
| Summary: | 碩士 === 國立臺灣科技大學 === 資訊工程系 === 107 === In advanced very-large-scale integration (VLSI) design, billions of transistors could be fabricated on the same die.
Integration circuit (IC) packaging has become one of the most important steps in IC design flow.
Fine pitch ball grid array (FBGA) is widely used in space constrained applications, such as mobile and handheld devices.
These packaging substrate interconnections are usually customized by layout engineers taking many complex and stringent design rules into considerations.
However, fully net-by-net manual design for FBGA is time consuming and error-prone.
In this thesis, we propose an integer linear programming (ILP) based router for wire-bonding FBGA packaging design.
Our ILP formulation takes design-dependent constraints and mismatched via dimension into account.
Three ILP constraint reduction techniques are developed to boost the run time of ILP optimization.
Experimental results indicate that our framework could effectively reduce the substrate layout design cycle time.
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