| Summary: | 碩士 === 國立清華大學 === 電機工程學系 === 107 === In recent years, multi-lenses cameras becomes the mainstream of smart-phones. The ability of changing focal planes after capturing the light field enables users to get the shallow-depth-of-field images. However, the fast realistic refocusing technique with high resolution is still a challenge. Therefore, this research topic becomes more and more important, and it will open more possibilities for many applications, such as auto-panning video and virtual reality display. In the thesis, we propose a Full-HD refocusing engine, which uses block-partitioned sparse light fields to synthesize numerous viewpoints and get a refocused image.
We store the sparse light fields in off-chip memory, which have less storage demand than dense light fields. But the number of rendered viewpoints is tremendous, and it results in high requirement of on-chip memory. The schedule of hierarchical pipeline is designed to synthesize numerous viewpoints using fixed number of on-chip memories. Besides, we apply two types of view-renderers with different parallelism to support the high throughput, including single-view renders in four-pixel/four-line parallelism and multi-view renders in four-pixel/four-line/four-view parallelism.
We implemented a VLSI circuit to support real-time Full-HD refocusing using TSMC 40nm technology process with 271-KB on-chip memory and 2.3M logic gates. The core area is 1.9x1.9 mm2. When synthesized at 200 MHz, it can deliver 5.4G rendered pixels per second and 40M refocused pixels per second to support Full-HD refocusing in real-time.
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