Design and Implementation Low-Ripple Charge Pump with Digitally-Controlled Oscillator

• Main Authors: Bang-Sheng Hu, 許邦陞
• Other Authors: Yu-Lung Lo
• Format: Others
• Language: zh-TW
• Published: 2018
• Online Access: http://ndltd.ncl.edu.tw/handle/u76f88

碩士 === 國立高雄師範大學 === 電子工程學系 === 107 === Charge pump circuits are widely used in flash memory, LCD monitor and three-dimensional VLSI, in recent years, many charge pump circuits have been studied and proposed, which are all improvements for performance and threshold voltage, and most of them are constructed by Dickson charge pump, which only used PMOS to design the positive voltage charge pump circuit. In this thesis, a PMOS, as a diode is proposed and using non-overlap clock circuit to control the low ripple voltage charge pump. First stage gate control effectively suppresses the associated inversion loss mechanism, and then the output voltage is divided into the detection control in the circuit. If output voltage is lower than the reference voltage, the digital control signal not only control the compensation driving circuit, which will turn on the corresponding compensation circuit, but also control the output frequency of digitally controlled oscillator(DCO) with the range of 2 MHz to 8 MHz. When the output voltage is charged to the certain value, the frequency which generated by DCO is increased to inhibit the ripple of the output voltage. The proposed circuit is designed in a standard UMC 0.18-μm 1P6M CMOS process. The input supply voltage is 3.3V. The main capacitance is 300 nF and the load capacitance is 2 μF. The output voltage range is 4.5 V to 5 V, and its ripple voltage is 112 μV. The power consumption is 14.08 mA with the maximum load current of 150 mA Up to 89% efficiency at load currents of 30 mA.