| Summary: | 碩士 === 國立宜蘭大學 === 電子工程學系碩士班 === 107 === In this thesis a low voltage operation circuit for low-power Voltage-Controlled Oscillator(VCO) and Mixer is developed. The practicality of the design was verified by simulation and measurement, fabricated in TSMC 0.18μm RF CMOS process. The proposed VCO and mixer is suitable for low-power applications.
The first part designs low power and low Phase Noise VCO. The forward body biasing technique can effectively lower the supply voltage and the power consumption. All PMOS transistor is used, high quality-factor LC tank, noise filtering and switched biasing techniques can successfully reduce the phase noise. The measured results show the power consumption is 0.3mW under 0.43V supply voltage. The frequency tuning range is 8% at 2.63GHz. The phase noise equals to -127dBc/Hz at 1 MHz offset frequency from the center frequency.
The second part designs low power mixer that mainly divided in RF active transconductance stage, LO folded passive sub-harmonic stage, current mirror and IF output. RF active transconductance stage converted a single signal into differential signal and improved gm. Better LO-VCO can be obtain by Sub-Harmonic Mixer(SHM) because it need only half of RF signal frequency. The forward body biasing technique can effectively lower the supply voltage and the power consumption. The measured results show the power consumption is 0.55 mW under 0.55 V supply voltage. The noise figure is 15 dB , conversion gain of 3.9 dB and IIP3 of -3 dBm at 10 MHz.
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