A Style-based Analog Layout Migration with Routing Behavior Preservation Technique

• Main Authors: Zi-Jun Lin, 林姿君
• Other Authors: Jing-Yang Jou
• Format: Others
• Language: zh-TW
• Published: 2019
• Online Access: http://ndltd.ncl.edu.tw/handle/p6z445

碩士 === 國立中央大學 === 電機工程學系 === 107 === In modern technology, more and more non-ideal effects should be considered in the circuit layout. Tool-generated analog layouts are still not well accepted by designers since notable performance loss often exists in post-layout simulations. Layout migration is one approach to generate a new layout for given circuits with different device sizes or different technology according to the original layout topology. This technology not only reduces the design time obviously but also preserves the valuable design expertise of designers. In this thesis, an automatic analog layout migration flow is proposed. The purpose is to migrate the design constraints and topology of the original layout to the target layout to enhance the circuit performance after layout. In previous work, the placement area and routing completion still have some space to be improved. Therefore, in this thesis, the possible placement of the original layout are recorded by using Depth-First Search-Sequence pair. Routing behavior of original layout are preserved completely with Cartesian Detection Line (CDL). As shown in the experimental results, the proposed algorithm keeps the circuits in a good performance and reduces the design time while migrating the circuits from 90nm to 65nm.