| Summary: | 碩士 === 國立成功大學 === 電腦與通信工程研究所 === 107 === This work presents an on-chip oscillator with resistive frequency locked loop and chopper stabilization techniques. It can break down the trade-off relationships between power consumption and temperature coefficient (TC) unlike the conventional relaxation oscillator. Accordingly, resistive frequency locked oscillator (RFLO) can reach a stable TC without losing the energy efficiency. With the current-chopper and the offset-chopper operating at different frequencies simultaneously, this avoids interfering with the accuracy of the equivalent resistance of the switched capacitor and effectively eliminates the TC issues from the non-idealities. Besides, it mitigates the low-frequency flicker noise due to the transistors, making the better long-term stability. It improves nearly ×10 of long-term stability compared with the modes with only one chopper turned on, and ×16 of long-term stability compared with the mode with no choppers turned on.
This work is fabricated by TSMC 180-nm CMOS process. It approach a 30.1 ppm/℃ of TC with 2.73 ppm (after 18s integration time) of long-term stability. It can generate the output frequency of 200 kHz while consuming only 293 nW, the energy efficiency of 1.47 nW/kHz. It can operate under a wide-range of supply voltage from 0.9 V to 1.8 V and achieve 0.64 %/V of line sensitivity. It can reach 94.14 dB of FoM1, and 89.78 dB of FoM2.
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