Study on Module Power Imbalance of Input-Series Output-Parallel DC/DC Converter

• Main Authors: Wen-ChingChang, 張文璟
• Other Authors: Jiann-Fuh Chen
• Format: Others
• Language: en_US
• Published: 2019
• Online Access: http://ndltd.ncl.edu.tw/handle/4v7j48

碩士 === 國立成功大學 === 電機工程學系 === 107 === In recent years, medium-voltage solid-state transformers (SST) have gradually developed into smart micro-grid, wind energy system and traction system. Compared with the line frequency distribution transformer, medium-voltage SST increases the operating frequency, which reduces volume and weight of magnetic components. The DC/DC converter of medium-voltage SST is limited by power semiconductor devices. Hence, it must select input-series output-parallel (ISOP) topology. However, the components of deviated parameters for the module cause the module power imbalance, which causes damage to components and more heat dissipation. Therefore, in this thesis, the module power imbalance is studied. The relation of input voltage and output current sharing is proposed in the ISOP DC/DC converter. Moreover, using software of SIMPLIS® simulation to verify the feasibility of the proposed relation. Finally, the prototype circuit of the ISOP resonant DC/DC converter with input voltage of 3.04 kV, output voltage of 380 V and output power of 9.5 kW is developed to verify the feasibility of the proposed relation.