Generating Single- and Double-Pattern Tests for Multiple CMOS Fault Models in One ATPG Run
碩士 === 國立成功大學 === 電機工程學系 === 107 === In this thesis, a novel test pattern generation method for multiple DC and AC faults is presented. The fault models considered include stuck-at faults, bridging faults, transition faults and transistor stuck-open faults. All faults are transformed into stuck-at f...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
2019
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Online Access: | http://ndltd.ncl.edu.tw/handle/jcabgq |