The Influence of the Cleaning Methods on the Yield of IC Test Process

• Main Authors: LIU,KENG-FU, 劉耕甫
• Other Authors: WEI,YIN-FANG
• Format: Others
• Language: zh-TW
• Published: 2019
• Online Access: http://ndltd.ncl.edu.tw/handle/mq59xf

碩士 === 高苑科技大學 === 電子工程研究所 === 107 === Time is money, but time is not able to be bought by money. It shows that, how expensive the time to us! How to improve yield in the production line is a race against time, and the test environment will be great and correct. Those time cost should be saved, which can reduce the test time and the time taken by test is great for company, and also can gain reliance from customers and raise brand value of the company. In the assembly line of IC tests, the low yield caused by the handler was down time main from the dirt, and the problem came from abrasion of machine compared much terrible. In contrast, it prefer problems that dirt is the easiest to happened in the test line, and the clean ways are easier. The more easy errors we handled, the more it happened. How to reduce the errors caused by dirt is IC test factory frequently faced. This study aims to understand the three ways to clean the IC test socket with Nano brush, air gun and laser machine. Using the experimental group and control group (the way of the auto clean) analysis the influences the IC test environment and flow, including FT and RT, and totally test time, to make a suitable IC test environment, and reduce the test time.