Integrated Circuit Layout Implementation of ECG Analog Front-end Circuits
碩士 === 中華大學 === 電機工程學系 === 107 === This thesis complete pre-layout simulations and circuit layouts of a single-lead and a multi-lead ECG analog front-end circuits. Our proposed ECG analog front-end circuit includes an instrumentation amplifier, a band-pass filter, and a post-amplifier. Besides, we u...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2019
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| Online Access: | http://ndltd.ncl.edu.tw/handle/w8d58k |
| Summary: | 碩士 === 中華大學 === 電機工程學系 === 107 === This thesis complete pre-layout simulations and circuit layouts of a single-lead and a multi-lead ECG analog front-end circuits. Our proposed ECG analog front-end circuit includes an instrumentation amplifier, a band-pass filter, and a post-amplifier. Besides, we use a driving right Leg (DRL) circuit to filter out common mode interference.
At first, we create an operational amplifier (OPA). Subsequently, we based on this OPA to construct a single-lead and a multi-lead ECG analog front-end circuit. We used the UMC 0.18um 2P6M CMOS process provided by National Applied Research Laboratories (NAR Labs) / Taiwan Semiconductor Research Institute (TSRI) to complete our proposed ECG analog front-end circuits. At present, pre-layout simulations and layout designs of single-lead and three-lead ECG analog front-end integrated circuits have completed.
Integrating multi-lead ECG analog front-end integrated circuit components and embedded microcontrollers with built-in analog-to-digital converters to construct multi-lead ECG measurement systems can significantly reduce the volume of the systems. The results of our work will be a part of multi-lead ECG measurement system-on-chip (SoC) in the future.
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