Improved Adaptive voltage scaling control loop for energy-efficient Deep Neural Network
碩士 === 國立中正大學 === 電機工程研究所 === 107 === Traditional circuit design to consider that operations is correctly under all conditions, leading to excessive margin because worst case design, timing sensor and adaptive scaling technology is effective to reduce voltage and excessive margin, this paper us pre-...
Main Authors: | Wang,Ren-Sian, 王人賢 |
---|---|
Other Authors: | Wang,Jinn-Shyan |
Format: | Others |
Language: | zh-TW |
Published: |
2019
|
Online Access: | http://ndltd.ncl.edu.tw/handle/qh6234 |
Similar Items
-
Variation-Resilient Adaptive Voltage Scaling Control Loop Design
by: CHANG, YU-SIAN, et al.
Published: (2016) -
Design of Adaptive Pooling in Deep Convolutional Neural Networks
by: Peng, Sian-Rong, et al.
Published: (2019) -
FPGA Evaluation Platform Design for Voltage-Over-Scaled Deep Neural Networks
by: CHIU, SHIH-LIN, et al.
Published: (2019) -
One Shot Crowd Counting with Deep Scale Adaptive Neural Network
by: Junfeng Wu, et al.
Published: (2019-06-01) -
VVC In-Loop Filtering Based on Deep Convolutional Neural Network
by: Soulef Bouaafia, et al.
Published: (2021-01-01)