A Reduced Storage Row-Stationary CNN Accelerator Design With Low Wiring Complexity
碩士 === 國立中正大學 === 電機工程研究所 === 107 === Ever since its publication in 2016 ISSCC, the Row Stationary (RS) architecture has been accredited for its high performance and low energy consumption in accelerating the computation of various CNN's. As such, follow-up research works has been sustaining mo...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2019
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| Online Access: | http://ndltd.ncl.edu.tw/handle/vsnp32 |