FPGA Accelerated Hardware Co-simulation
碩士 === 國立臺灣大學 === 資訊網路與多媒體研究所 === 106 === Before the hardware of a system is available, developers often use a virtual platform to develop software for the system. However, to deliver a fast and accurate simulation of systems is still an important issue that is open for research. And FPGA chips has...
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| Format: | Others |
| Language: | en_US |
| Published: |
2018
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| Online Access: | http://ndltd.ncl.edu.tw/handle/jd6ya8 |
| Summary: | 碩士 === 國立臺灣大學 === 資訊網路與多媒體研究所 === 106 === Before the hardware of a system is available, developers often use a virtual platform to develop software for the system. However, to deliver a fast and accurate simulation of systems is still an important issue that is open for research. And FPGA chips has many benefits such as high power-performance ratio, good at intensive integer operation and can be reconfigured to adapt to different workloads. Such structure has the performance of hardware and the flexibility of software. In the thesis, with FPGA, we accelerate the cache simulation part of VPMU and let user profile a program much faster.
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