A Fast Response Low Jitter Constant On-Time Controlled Buck Converter

• Main Authors: Yu-Kang Chen, 陳友康
• Other Authors: 林宗賢
• Format: Others
• Language: en_US
• Published: 2018
• Online Access: http://ndltd.ncl.edu.tw/handle/73pwtr

碩士 === 國立臺灣大學 === 電子工程學研究所 === 106 === Power management IC (PMIC) is a critical building block in integrated circuits for providing stable supply voltages. Two dc-dc buck converters are implemented and verified in this thesis. The first work proposes an on-resistance model. This model is applied in the design of a 10-MHz constant on-time controlled buck converter with 92% peak efficiency. The estimated on-resistance from the proposed model is only 2 percent in error with measured value. This work is realized with 300 nH inductor and 4.7 uF capacitor. The input voltage is 1.8 V and the output voltage is 1 V. The output current can be as high as 1 A and the output ripple is less than 10 mV. The second work improved the jitter behavior of the first one and proposed a voltage-clamped ramp compensator to speed up the transient response. A fast response low jitter constant on-time controlled buck converter with 91% peak efficiency is been implemented. Operating at 10-MHz switching frequency, this work is realized with 300 nH inductor and 4.7 μF capacitor. The input voltage is 1.8 V and the output voltage is 1 V. The output current can be as high as 0.4 A and the output ripple is less than 15 mV. Both of two works are fabricated in TSMC 0.18 μm CMOS process.