| Summary: | 碩士 === 國立臺灣海洋大學 === 資訊工程學系 === 106 === This paper presents a novel 8-bit RISC MCU architecture based on Microchip PIC16LF84 specifications from the mid-range PIC series, and completes the digital integrated circuit design flow. The proposed MCU architecture includes a two-stage pipeline with instruction cycle, which reduces the system from eight clock cycles to four clock cycles. The MCU’s instruction set is fully compatible PIC16LF84, including interrupts, watchdog timer and sleep mode. Its peripherals include general-purpose I/O ports and timer. The MCU architecture—written in Verilog HDL—was simulated using ModelSim to verify the correctness of the Soft IP. Next, the EDA cloud—provided by National Chip Implementation Center—is used for logic synthesis, floorplan, place and routing using TSMC 0.18μm technology. Then, through the DRC / LVS verification, the Hard IP of the proposed PIC MCU has been completed. The area of PIC16LF84 MCU is 1.195mm2 and its speed is up to 150MHz. This paper also designed a programming system for PIC MCU, including the circuit in the chip, programming firmware and computer software. It provides two kinds of serial communication interfaces: EEPROM and Flash. Users can facilitate program burning in memory.
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