Signal processing and LDPC decoding architectures for NAND flash memory systems

博士 === 國立清華大學 === 電機工程學系所 === 106

Bibliographic Details
Main Authors: Yang, Tsung-Chieh, 楊宗杰
Other Authors: Ueng, Yeong-Luh
Format: Others
Language:en_US
Published: 2018
Online Access:http://ndltd.ncl.edu.tw/handle/vyh4k4
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spelling ndltd-TW-106NTHU54410942019-06-27T05:28:45Z http://ndltd.ncl.edu.tw/handle/vyh4k4 Signal processing and LDPC decoding architectures for NAND flash memory systems 適用於快閃記憶體系統之訊號處理與低密度查核碼架構 Yang, Tsung-Chieh 楊宗杰 博士 國立清華大學 電機工程學系所 106 Ueng, Yeong-Luh 翁詠祿 2018 學位論文 ; thesis 86 en_US
collection NDLTD
language en_US
format Others
sources NDLTD
description 博士 === 國立清華大學 === 電機工程學系所 === 106
author2 Ueng, Yeong-Luh
author_facet Ueng, Yeong-Luh
Yang, Tsung-Chieh
楊宗杰
author Yang, Tsung-Chieh
楊宗杰
spellingShingle Yang, Tsung-Chieh
楊宗杰
Signal processing and LDPC decoding architectures for NAND flash memory systems
author_sort Yang, Tsung-Chieh
title Signal processing and LDPC decoding architectures for NAND flash memory systems
title_short Signal processing and LDPC decoding architectures for NAND flash memory systems
title_full Signal processing and LDPC decoding architectures for NAND flash memory systems
title_fullStr Signal processing and LDPC decoding architectures for NAND flash memory systems
title_full_unstemmed Signal processing and LDPC decoding architectures for NAND flash memory systems
title_sort signal processing and ldpc decoding architectures for nand flash memory systems
publishDate 2018
url http://ndltd.ncl.edu.tw/handle/vyh4k4
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