Implementation of a new 2-bit non-volatile memory cell with a stepped gate structure

碩士 === 國立清華大學 === 電子工程研究所 === 106 === abstract hide

Bibliographic Details
Main Authors: Yang, Tsung-Yu, 楊宗祐
Other Authors: Hsu, Yung-Jane
Format: Others
Language:zh-TW
Published: 2017
Online Access:http://ndltd.ncl.edu.tw/handle/xs9phg
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spelling ndltd-TW-106NTHU54280232019-05-16T00:15:33Z http://ndltd.ncl.edu.tw/handle/xs9phg Implementation of a new 2-bit non-volatile memory cell with a stepped gate structure 新型雙位元階梯式閘極非揮發性記憶體的研製 Yang, Tsung-Yu 楊宗祐 碩士 國立清華大學 電子工程研究所 106 abstract hide Hsu, Yung-Jane 徐永珍 2017 學位論文 ; thesis 76 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 國立清華大學 === 電子工程研究所 === 106 === abstract hide
author2 Hsu, Yung-Jane
author_facet Hsu, Yung-Jane
Yang, Tsung-Yu
楊宗祐
author Yang, Tsung-Yu
楊宗祐
spellingShingle Yang, Tsung-Yu
楊宗祐
Implementation of a new 2-bit non-volatile memory cell with a stepped gate structure
author_sort Yang, Tsung-Yu
title Implementation of a new 2-bit non-volatile memory cell with a stepped gate structure
title_short Implementation of a new 2-bit non-volatile memory cell with a stepped gate structure
title_full Implementation of a new 2-bit non-volatile memory cell with a stepped gate structure
title_fullStr Implementation of a new 2-bit non-volatile memory cell with a stepped gate structure
title_full_unstemmed Implementation of a new 2-bit non-volatile memory cell with a stepped gate structure
title_sort implementation of a new 2-bit non-volatile memory cell with a stepped gate structure
publishDate 2017
url http://ndltd.ncl.edu.tw/handle/xs9phg
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