Body-Raised Punch Through CMOS for Low Power Supply Applications
碩士 === 國立中山大學 === 電機工程學系研究所 === 106 === In this thesis, we propose a punch through complementary metal oxide semiconductor (PTCMOS) with a raised body for suppressing diffusion current (BR-PTCMOS) in low power supply applications. Complementary behavior is achieved through two punch-through transist...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2018
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/536ncw |
| Summary: | 碩士 === 國立中山大學 === 電機工程學系研究所 === 106 === In this thesis, we propose a punch through complementary metal oxide semiconductor (PTCMOS) with a raised body for suppressing diffusion current (BR-PTCMOS) in low power supply applications. Complementary behavior is achieved through two punch-through transistors. The punch-through mechanism of these two transistors is analyzed. The raised body is found to effectively suppress diffusion current.
According to the TCAD simulations, at VDD = 0.5 V, the ION/IOFF ratios are simulated to be 1.61 × 105 for the body-raised punch through PMOS (BR-PTPMOS) and 5.97 × 105 for the body-raised punch through NMOS (BR-PTNMOS) compared with 1.5 × 105 for the NMOS and 1.61 × 105 for the PMOS of conventional CMOS with the same fin length 20 nm. The new device has significant lower power dissipation than a conventional CMOS. A BR-PTCMOS inverter consumes 0.18 pW at VDD = 0.5 V with a power-delay product of 0.126 nW•ns whereas the conventional CMOS consumes 955 pW with a power-delay product of 27.73 nW•ns. Thus, the BR-PTCMOS is an attractive candidate for low power supply applications.
|
|---|