Summary: | 碩士 === 國立中央大學 === 電機工程學系 === 106 === The placement results have large impacts on routing results. In order to keep circuit performance and eliminate non-ideal effects, we have to predict routing cost at layout placement stage. Most of current approaches use semi-perimeter method to predict the routing cost at placement stage. It might not be correct in multi- terminal routing cases. Moreover, for sensitive analog circuits, routing cost considers more than wire length only. The turn numbers of each metal line and the via numbers of each net will also effect circuit performance.
In this thesis, we use machine learning technique to help designer predict the routing cost at placement stage. With the predicted routing cost, we can make proper adjustment in advance to avoid unnecessary design iterations. Using artificial neural networks for machine learning, we can use the placement information to predict the routing cost, such as wire length, via numbers, and turn numbers. As shown in the experimental results, we can accurately predict wire length, via number, turn number base on the neural network models. They can be good references for designers to determine a good layout placement.
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