Efficient Lifetime Yield Analysis with Analog Behavioral Models
碩士 === 國立中央大學 === 電機工程學系 === 106 === With the shrinking device size in deep-submicron era, the parameter shift due to process variation and aging effects has an increasing impact on the circuit yield and reliability, especially for sensitive analog circuits. If we can consider the impact of device p...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2018
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| Online Access: | http://ndltd.ncl.edu.tw/handle/sj9ce7 |