Sixteen-Channel Biomedical Signal Processing FPGA System Platform; Integration of Microcontroller, Data Converter and FastICA Hardware Accelerator
碩士 === 國立交通大學 === 電機工程學系 === 106 === In this paper, sixteen channels of biomedical signal processing FPGA platform are mainly integrated RISC-V microcontroller, data converter and cost-effective real-time FastICA hardware accelerator. Unlike the traditional pure hardware or software implementation....
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| Format: | Others |
| Language: | zh-TW |
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2018
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| Online Access: | http://ndltd.ncl.edu.tw/handle/p76j64 |
| Summary: | 碩士 === 國立交通大學 === 電機工程學系 === 106 === In this paper, sixteen channels of biomedical signal processing FPGA platform are mainly integrated RISC-V microcontroller, data converter and cost-effective real-time FastICA hardware accelerator. Unlike the traditional pure hardware or software implementation. This work proposed a hardware/software co-design and co-optimization for FastICA circuit. It yields real-time capability for most biomedical application. A hardware separation accelerator is designed for real-time ability to separate ICA components through the demultiplexing matrix according to the whitened data. Using machine code to run ICA algorithm exclude separation part in the microprocessor to reduce the area of overall hardware resource. A one-time SVD calculation method is used if measure enough data, then singular values converge to constant value. By adopting these methods, the power dissipation of the FastICA implementation for sixteen-channel signal separation is 1.847 mW at 40Mhz at 3.3V. The latency of FastICA is average about 0.05 second in our fast mode. The platform includes FPGA with embedded core of a 32-bit RISC-V processor, and hardware separation IP. The performance of the platform was verified by human dataset.
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