Physical Mechanism of Structure-dependent Bias Stability and Illuminated Hot-carrier effect on Reliability of InGaZnO Thin-Film Transistors for Advanced Displays

• Main Authors: Yang, Chung-I, 楊崇巽
• Other Authors: Chou, Wu-Ching
• Format: Others
• Language: en_US
• Published: 2018
• Online Access: http://ndltd.ncl.edu.tw/handle/h83t75

博士 === 國立交通大學 === 電子物理系所 === 106 === In recent years, along with rapid development of flat panel display industry, widely used in electronic products, such as high resolution television, notebook computers, digital cameras and intelligent information products. Thin film transistors (TFTs) play important role in pixel switch and current drive, so the electrical performance and stability of reliability in TFTs will directly affect the quality of advanced flat panel display. Metal oxide thin film transistor has high electron mobility, high uniformity, high transparency to visible light and low-temperature process, which attract investment in many research institutes and corporations; Although metal oxide thin film transistors have shown excellent performance, they still have reliability issues such as instability under illumination and bias stress. Because of the important role of thin film transistors in active matrix organic light emitting diode (AMOLED), the effect of gate-bias stability, hot-carrier effect, materials of electrode, different structure of electrodes, and short channel effect for a-IGZO TFTs are investigated in this dissertation. In the first part of this dissertation, degradation behaviors induced by hot carriers in the etch stop layer (ESL) in a-IGZO TFTs with different electrode materials and structures has been investigated. This work investigates the hot carrier effect in via-contact type a-IGZO TFTs with various source/drain materials and structures. The redundant drain electrode plays an important role in hot carrier stress-induced degradation, which leads to carrier-trapping in the ESL between the active layer and the redundant drain electrode. Hot carrier stress has different influences on device characteristics, depending on materials and structure. Hot carrier stress causes more electron trapping in the etch stop layer below the redundant drain electrode in the presence of smaller source/drain metal work function or a longer redundant drain electrode. To further verify the mechanisms of the degradation behavior, the barrier height for Fowler-Nordheim-tunneling is extracted by a fitting charge trapping model. It is found that the barrier height for Fowler-Nordheim-tunneling is different for different source/drain materials. The second part characterized the electrical analyses and physical mechanisms of metal gate structure-depended performance test in a-IGZO TFTs are investigated. The difference of shielded area between IGZO layer and metal gate is discussed. Under the different metal gate length devices, an abnormal rise in capacitance at the off-state in capacitance-voltage characteristics curves can be observed. It is attributed to the stronger electric field induced by edge of metal gate under bias sweep when the length of metal gate is shorter than IGZO layer length. Under light illumination measurement, the behaviors of threshold voltage shift in negative direction and subthreshold-leakage current can be observed whether the lengths of metal gate are larger than IGZO layer or not in both front-light and back-light illumination. Moreover, it is found that the threshold voltage shifts negatively more severe and hump more obviously in capacitance-voltage characteristics curves under back-light illumination with the shorter width device, and this phenomenon which verified by the simulation tool. After the negative gate bias illumination stress (NBIS), it is found that the devices which have edge effect caused the more severe hole injection into the gate insulator. In the final part, this work finds out a method to ameliorate a short channel effect behavior in via-contact type amorphous-indium-gallium-zinc-oxide thin-film transistors which the dimension of thin film transistor is micrometer-scale. According to ideal short channel effect, this phenomenon occurs in nanometer-scale MOSFET. This means that a-IGZO TFTs encounter short channel effect earlier as scaling down. Understanding of how a-IGZO TFT performance is affected by varying L is, therefore, essential in the process of elevating new a-IGZO TFT technologies. In particular, a-IGZO TFTs have been reported to exhibit a Vth dependence on L, but little has been done to explain the origin of this degradation and how to solve this degradation. This part, therefore, investigates the length dependence in inverted staggered a-IGZO TFTs. we consider a method to ameliorate a scaling-down effect in bottom gate amorphous-indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs). A threshold voltage (Vth) dependence on drain voltage (VD) is reported for a-IGZO TFTs. The Vth is found to shift negatively when increasing the Id-Vg measurement condition VD from 0.1V to 15V. Analysis of both current-voltage Id-Vg and Id-Vd curves show that this degradation is caused by the effective channel length (Leff) being shorter than the mask channel length (L). Using the transmission line method (TLM) to extract contact resistance and effective length, we discover that the degradation will be completely suppressed by an annealing treatment, and the effective length will be close to the mask channel length. As a result, the degradation mechanism of shorter channel length a-IGZO TFTs is due to oxygen-vacancies which are located between the a-IGZO active layer and the source/drain junction. Hence, a significant drain induced barrier lowering degradation can be observed.