| Summary: | 碩士 === 國立交通大學 === 電子研究所 === 106 === Low-density parity-check (LDPC) codes have performances very close to Shannon limit and have attracted a lot of attention since recent years. Although LDPC codes have good decoding performances, it costs a huge amount of time on decoding operations. Performance measures of LDPC codes include bit error rate (BER), decoding throughput, decoding power and decoding time, etc. To improve performance of LDPC codes, long code lengths are necessary. Since in LDPC decoding it needs to receive whole codewords then start the decoding operation. As such, it will introduce considerable delay time which is undesirable in low delay applications such as future 5G communications systems.
According to Fibonacci-like QC-LDPC code performance approach to random code and low complexity. With some systematic difference between each element of Fibonacci-like sequences, a receiver can locate error bits without remembering the parity check matrix in the re-encoding procedure. In this thesis, we modified Fibonacci-like QC-LDPC code to re-encode codewords and detect error bits with characteristic of Fibonacci-like sequences. We zero some circular permutation matrices of Fibonacci-like QC-LDPC with dual diagonal construction to avoid interference caused by the complex re-encoding procedure and increase the success rate of our method of locating error. While receiving whole codewodes, this work locates error bits and modifies received information before commencing decoding procedures. As a result, the proposed decoding scheme can reduces both the iteration number at least 25% in the decoding procedures and bit error rate about 50% with fewer iteration numbers.
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