Hybrid-Threading Architecture for Soft-PHY Uplink

碩士 === 國立交通大學 === 資訊科學與工程研究所 === 106 === Based on demand for network transmission, there has invested lots of resources to develop the specification of 5G. Due to the limitation of hardware, Soft PHY becomes more and more popular to implement PHY layer. In this paper, we propose a FDD’s multi-thread...

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Main Authors: Hsin, Po-Hui, 辛柏輝
Other Authors: 許騰尹
Format: Others
Language:zh-TW
Published: 2017
Online Access:http://ndltd.ncl.edu.tw/handle/7jkksk
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spelling ndltd-TW-106NCTU53940392019-05-16T00:08:11Z http://ndltd.ncl.edu.tw/handle/7jkksk Hybrid-Threading Architecture for Soft-PHY Uplink 實作混合式執行緒架構於上行軟體實體層 Hsin, Po-Hui 辛柏輝 碩士 國立交通大學 資訊科學與工程研究所 106 Based on demand for network transmission, there has invested lots of resources to develop the specification of 5G. Due to the limitation of hardware, Soft PHY becomes more and more popular to implement PHY layer. In this paper, we propose a FDD’s multi-threading architecture based on Soft PHY to improve performance for whole eNB PHY layer. Due to the limited timing(1 ms) in PHY layer, we uses Pthread to cooperate with GPU and achieve multitasking for supporting multi users. We let PHY layer have more available CPU timing and much higher throughput to speed up. This paper focuses on the operation of Pthread and the verification of speedup for PHY uplink. 許騰尹 2017 學位論文 ; thesis 16 zh-TW
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description 碩士 === 國立交通大學 === 資訊科學與工程研究所 === 106 === Based on demand for network transmission, there has invested lots of resources to develop the specification of 5G. Due to the limitation of hardware, Soft PHY becomes more and more popular to implement PHY layer. In this paper, we propose a FDD’s multi-threading architecture based on Soft PHY to improve performance for whole eNB PHY layer. Due to the limited timing(1 ms) in PHY layer, we uses Pthread to cooperate with GPU and achieve multitasking for supporting multi users. We let PHY layer have more available CPU timing and much higher throughput to speed up. This paper focuses on the operation of Pthread and the verification of speedup for PHY uplink.
author2 許騰尹
author_facet 許騰尹
Hsin, Po-Hui
辛柏輝
author Hsin, Po-Hui
辛柏輝
spellingShingle Hsin, Po-Hui
辛柏輝
Hybrid-Threading Architecture for Soft-PHY Uplink
author_sort Hsin, Po-Hui
title Hybrid-Threading Architecture for Soft-PHY Uplink
title_short Hybrid-Threading Architecture for Soft-PHY Uplink
title_full Hybrid-Threading Architecture for Soft-PHY Uplink
title_fullStr Hybrid-Threading Architecture for Soft-PHY Uplink
title_full_unstemmed Hybrid-Threading Architecture for Soft-PHY Uplink
title_sort hybrid-threading architecture for soft-phy uplink
publishDate 2017
url http://ndltd.ncl.edu.tw/handle/7jkksk
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