High-Efficiency Test Compression Technology and On-Chip Self-Test Methodology with All Deterministic Compressed Test Patterns Recorded in Low Power Scan Chains

碩士 === 國立成功大學 === 電腦與通信工程研究所 === 106

Bibliographic Details
Main Authors: Bo-RenChen, 陳柏任
Other Authors: Kuen-Jong Lee
Format: Others
Language:en_US
Published: 2018
Online Access:http://ndltd.ncl.edu.tw/handle/tnk8rp