Gold Stud Bump with High Speed and High Frequencyfor DRAM Package Applications
碩士 === 國立成功大學 === 電機工程學系碩士在職專班 === 106
Main Authors: | Hsiang-MingHuang, 黃祥銘 |
---|---|
Other Authors: | Yeong-Her Wang |
Format: | Others |
Language: | zh-TW |
Published: |
2018
|
Online Access: | http://ndltd.ncl.edu.tw/handle/b9k38w |
Similar Items
-
The Investigation of Interfacial Reaction between Gold Stud Bump and Solder in Flip-Chip Chip Scale Package
by: LI-JU HUANG, et al.
Published: (2005) -
The optimiztion of the Gold Stud Bump process used in the Flip Chip technology
by: Burce Chen, et al.
Published: (2004) -
Study on the Thermosonic Bonding of Gold Stud bump onto Flex Substrate with Nickel deposited Layer
by: Huang-feng Fan, et al.
Published: (2009) -
Study on the Gold Stud Bump Bonding Process on Copper Pads for Chips with Copper Interconnects
by: Jun-Jie Hsu, et al.
Published: (2005) -
Evaluations of the Applicability of Ag-alloy Stud Bump on Flip-Chip Assembly
by: Yu-Ting Shih, et al.
Published: (2014)