A Model and Design of a Distributed Hierarchical Parallel Controller

碩士 === 國立成功大學 === 電機工程學系 === 106 === Because of operation executing time would be changed by the factors such as process, environment, hardware aging and speculative function unit, unexpected data hazard problem will make error result in dynamically execution. In this master's dissertation, we...

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Bibliographic Details
Main Authors: Po-HsienChen, 陳柏憲
Other Authors: Jer-Min Jou
Format: Others
Language:zh-TW
Published: 2018
Online Access:http://ndltd.ncl.edu.tw/handle/556nd7
Description
Summary:碩士 === 國立成功大學 === 電機工程學系 === 106 === Because of operation executing time would be changed by the factors such as process, environment, hardware aging and speculative function unit, unexpected data hazard problem will make error result in dynamically execution. In this master's dissertation, we use parallel executing, distributed and hierarchical concepts to develop a controller model for random latency operations. Parallel execution can increase the number of operations in fixed time and enhance the execution speed. Distributed method can efficiently control parallel execution of function units. Prevent finished function unit get into idle status from other unfinished operations and increase the performance of chip. Data hazard caused by dynamic operation will make operation result wrong. Therefore, this master's dissertation propose three theorems. When the executing operation satisfies the three theorems, data hazard is solved. And we classify the controllers that handle data hazard into smaller control units in hierarchical method. Data hazard which is caused by dynamic operation can be solved by the mutual communication between control units. The functions and design difficulties of each control unit will also be greatly reduced and simplified. According to the experimental results, our controller model can effectively reduce the idle time of function unit, and prevent error caused by data hazard.