Fine tuning of electroplating recipe to reach effective inhibition of impurity incorporation in Cu plated layer and voids at Sn/Cu interface

博士 === 國立中興大學 === 化學工程學系所 === 106 === In development process of electronic products, from the size trend smaller and lighter transfer to become higher and multiple performances progressively. The key technique of smaller width and higher density in circuit and the 3-dimensional HDI (high density int...

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Bibliographic Details
Main Authors: Hsuan Lee, 李軒
Other Authors: Chih-Ming Chen
Format: Others
Language:zh-TW
Published: 2017
Online Access:http://ndltd.ncl.edu.tw/handle/pq75ts
Description
Summary:博士 === 國立中興大學 === 化學工程學系所 === 106 === In development process of electronic products, from the size trend smaller and lighter transfer to become higher and multiple performances progressively. The key technique of smaller width and higher density in circuit and the 3-dimensional HDI (high density interconnect) structure on PCB (printed circuit board) will follow these tendencies, and reliability of solder joints becomes more important as its increasing density used as connector between circuit boards. Because European Union announced the rule RoHS in 2006, the mainstream of electronic devices starts to use lead-free solder to replace Pb-solder. The increasing in Sn proportion results in the brittle IMC growing at faster rate and therefore harms the solder joints reliability also electronic products life. The Kirkendall effect is identified as the main reason to cause the IMC voids in Cu/Sn system, because of the disequilibrium between Sn and Cu atoms diffusion rate. In recent years, more and more researches pointeded out the additives used in electroplating Cu would be covered on Cu and are incorporated into the Cu plated layer during plating process, and these impurities would cause the voids appear in IMC after interfacial reaction. Three kinds of major additives used in electroplating Cu are inhibitor, accelerator, and leveler. In the related researches, the effectiveness of accelerator plays a key role which can increase grain size and inhibit impurity incorporation to reach a void-free IMC formation. This thesis keeps on studying the additive effect, where the PEG used as inhibitor and three kinds of accelerators which have different functional groups were discussed the effectiveness of exclusion impurities. As accelerators added in same concentration, the additive PCZ showed the same level of grain size and impurities as compared with the additive PC that had suppressor only. For interfacial reaction between electroplated Cu and pure Sn, a special multi-layer IMC structure was formed by numbers of band voids distributed parallel with interface in IMC after thermal aging at 200 °C, and this multi-layer IMC were found in electroplated Cu PC and PCZ. The strength of solder joints examined by ball shear test showed the multi-layer structure had 2 times lower than void-free IMC. The improvement of impurities and voids level were adjusted by the plating parameters as additives focus on PC and PCZ. The PC inhibited voids formation through lower plating rate. In the adjustment of PCZ, the ZPS concentration increased till 80 ppm still had few voids, so the accelerator ZPS used lower current more comfortably because of inhibiting voids more success. According to the above results, the IMC structure had large difference after same aging process because of the impurity level. The Cu3Sn from high impurity Cu had crushed and friable grain so that the atom could pass faster than void-free IMC, and that resulted in thicker IMC and poor reliability in solder joints. Using suitable collocation between different additives and plating parameters could inhibit voids and IMC consumption had report by this thesis in detail.