A Design of a Performance Enhanced Dual-Slope Analog-to-Digital Converter.
碩士 === 國立高雄應用科技大學 === 電子工程系 === 106 === In this paper, we make investigations and analyses of the dual-slope analog-to-digital converter (ADC). In order to modify the drawback that traditional dual-slope ADC requires huge conversion time and high power consumption, this paper presents a modified dua...
Main Authors: | Chan, Ching-Hsiang, 詹景翔 |
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Other Authors: | Ting, Hsin-Wen |
Format: | Others |
Language: | zh-TW |
Published: |
2018
|
Online Access: | http://ndltd.ncl.edu.tw/handle/n85tbx |
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