FPGA Design for Novel Direct Digital Frequency Synthesizers

• Main Authors: LU, DUN-REN, 呂敦仁
• Other Authors: Kuo, Chan-Tsung
• Format: Others
• Language: zh-TW
• Published: 2018
• Online Access: http://ndltd.ncl.edu.tw/handle/gqeue8

碩士 === 國立金門大學 === 電子工程學系碩士班 === 106 === Direct Digital Frequency Synthesizer (DDFS) is widely used in modern electronic devices and communication systems. The frequency synthesizer is divided into (Direct Analog Frequency Synthesizer：DAFS), (Phase-looked loop：PLL), and (Direct Digital Frequency Synthesizer：DDFS). Among them, the direct digital frequency synthesizer can be divided into (ROM-base) and (ROM-less) architectures based on the presence or absence of (ROM). And the direct digital frequency synthesizer has the advantages of good frequency resolution, fast frequency switching, etc. It is also the used study in this article. The main considerations of the direct digital frequency synthesizer are memory size, circuit area size and output signal efficiency. This dissertation mainly proposes the least square method and constant accumulation method to approximate the sine wave, both using the Uniform segments and Non-Uniform segments modes, and the simulation results of the two methods will be discussed. According to the simulation results, it can be seen that the Spurious Free Dynamic Range (SFDR) linearly increases with the number of segments, and the number of quantization bits also has a great influence on the output signal. 　　The proposed mathematical model of the linear approximation in this paper is simulated using MATLAB and Modelsim. The hardware implementation adopts Xilinx Spartan 3E-1600 FPGA. In addition, the circuit architecture of the proposed method in this paper is only implemented using constant adder and shift-and-add. Compared with the method using a large number of multipliers in the traditional literature, this paper will increase the SFDR value, reduce the approximation error and reduce the area of the hardware. In this thesis, the SFDR can achieve 96dBc using the Uniform segments least-squares method, the SFDR can achieve 104.6dBc for the Non-Uniform segments least squares method and the SFDR can achieve 70.7dBc for the constant-accumulation method.The approximation error of the Non-Uniform segments least square method is 1.044×10-4 and the approximation error of the constant accumulation method is 2.316×10-3.