| Summary: | 碩士 === 義守大學 === 電機工程學系 === 106 === This thesis presents an interleaved two-switch buck-boost (TSBB) typed inverter for grid-connection applications. The proposed inverter is developed by connecting two buck-cascaded buck-boost (BuCBB) dc-dc converters in interleaving parallel, and then connecting with H-bridge unfolding circuit of the low-frequency switching. According to the levels of input-voltage, the proposed inverter can operate in either buck-typed or boost-typed operation principle. Due to the cancelation of inductor ripple-current, size and cost of input and output filters can be reduced. The output power is shared equally by two parallel dc-dc converters. Therefore the overall conduction losses of power switches and inductors can be reduced to improve system efficiency. The system uses the digital signal processor dsPIC33FJ16GS504, providing multiple sets of SPWM control signals, simplifying circuit complexity. Finally, an 800W prototype circuit is fabricated for the an interleaved two-switch buck-boost typed inverter. The simulated and experimental results are measured to verify the correctness and feasibility of the proposed inverter.
|
|---|
