Analyses of the Wafer Probing Under the Circumstance of Temperature Variations for Augmenting the Overall Yield Rate

碩士 === 中原大學 === 電機工程研究所 === 106 === Under a thermal shock, not only is the characteristic curve of the semiconductor device sensitive to the temperature variations, but the setting of the wafer probing test accessories and the machine itself also has an impact onto the surrounding temperature, which...

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Bibliographic Details
Main Authors: Ching-Sheng Lin, 林錦聖
Other Authors: Tsan-Ming Wu
Format: Others
Language:zh-TW
Published: 2018
Online Access:http://ndltd.ncl.edu.tw/handle/rkt969
Description
Summary:碩士 === 中原大學 === 電機工程研究所 === 106 === Under a thermal shock, not only is the characteristic curve of the semiconductor device sensitive to the temperature variations, but the setting of the wafer probing test accessories and the machine itself also has an impact onto the surrounding temperature, which would result in a low yield rate of the semiconductor fabrications. In this technical report, we will study the key factor “ a wafer probing test” via observations and measurements of the pad scratches located at the setting of the wafer probing machine under the circumstance of temperature variations. In general, verifications of the structure and functionalities for semiconductor devices or integrated circuits (IC) guarantee the integrity of the wafer products in the system level, conducted basically a comprehensive testing procedure to all IC products according to the corresponding test specifications. The purpose of verifications lies in not only eliminating the defective products through the failure of the testing specification for meeting the expected criterion of each product, but also classifying each product through various qualities for fulfilling the needs of different potential customers. As a result, those fail to pass the standard criterion can be avoided flowing to the client, while those successful to pass the verifications can be distributed in different classes for the rating evaluation. In fact, the evaluations of the semiconductor device are via the utilization of the probe cad where the input, output, voltage supply, grounding, and other endpoints of the integrated circuits are connected to the computer test machine, for testing their functionalities, leakage currents, current drive capabilities, and so on. Furthermore, in an advanced IC fabricated process, the introduction of a thermal shock, operating at high and low temperatures, to the testing evaluations has played an important role for verifying the specifications. Under the evaluations of a thermal shock, the problem we have to face lies in a poor yield rate, which often results from a poor contact. This is because the test accessories have occurred deformations when a huge variation of the temperature is operated. However, those deformations of the test accessories are given an evidence of a low yield rate. In other words, through careful examinations for the deformations of the fittings, several main factors, such as the temperature control, various accessories, and probing pressures, can be discussed and compared with one another to provide a better solution for enhancing the overall yield rate of the wafer, which is the main issue of this technical report.