Generate Launch-off-Shift Low Power Patterns by Using Two-Clock Circuit Model and Pattern Compaction
碩士 === 中原大學 === 電子工程研究所 === 106 === This thesis proposes two-clock circuit model and a method of pattern compaction. We first eliminate all flip-flops, copy the remaining circuit, and connect pins between two circuits to complete building two-clock circuit model for generating launch-off-shift (LOS...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2018
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| Online Access: | http://ndltd.ncl.edu.tw/handle/tq494t |