| Summary: | 碩士 === 國立中正大學 === 電機工程研究所 === 106 === As the technology node progresses and the operating frequency of circuit and system increases, variation’s affection becomes more and more critical, and jitter effect is one of the most severe variations.
However, jitter effect is difficult to be measured and quantified in most on chip systems. In the past, jitter had to be measured via external equipment, but as the operating frequency rise, the equipment which is able to conduct high frequency jitter measurement are costly, and the probe-caused noise will affect the measurement results. To measure jitter more effective, on-chip jitter sensor is a better choice than external equipment. However, if the variation occurs during measurement phase, the results will have great chance being flaw. This paper proposed design of high resolution, low measured jitter error and variation resilient on-chip jitter sensor for DDR4-3200 [1]. Compare to conventional jitter sensors, we propose run-time automatic resolution calibration circuit. Resolution calibration will be done before every measurement phase, after calibration our jitter sensor can detect active variation occurrence and dynamically adjust resolution.
This work is done in UMC 28nm process, 0.9V operating voltage, and the operating frequency is same as DDR4-3200 circuit, 1.6GHz, with 1ps resolution, 2.13mW power consumption and approximate 167nm×98um die area, worst case measurement error improve from 331% to -148%.
|
|---|
