Study and Implementation of Interleaved Three-level Resonant Converter

• Main Authors: SYU,HAN-SHENG, 許瀚升
• Other Authors: LIN,BOR-REN
• Format: Others
• Language: zh-TW
• Published: 2017
• Online Access: http://ndltd.ncl.edu.tw/handle/x4u5js

碩士 === 國立雲林科技大學 === 電機工程系 === 105 === This thesis presents an interleaved three-level resonant converter for high power and high input voltage applications. This circuit topology of the proposed converter is based on half-bridge LLC resonant circuit. Using the advantage of the LLC resonant converter such as zero voltage switching (ZVS) for power switches and zero current switching (ZCS) for the rectifier diodes charecteristics, the proposed converter can achieve high power capability and high circuit efficiency. Interleaved PWM technique can reduce the ripple current on output side and also improve the life of output filter capacitor. The primary side of the two three-level resonant converters are connected in parallel to reduce the input ripple current. Each three-level resonant converter consists of two LLC resonant circuits in series by sharing the same isolated transformer and resonant inductor. The voltage stress of each power switch is calmped at one half of input voltage for high input voltage applications. The secondary side of the proposed circuit is composed of two center-tapped rectifiers in parallel to reduce the current rating on output passive components. The design considerations and operation modes of the proposed converter will be analyzed in detail. The circuit effectiveness is confirmed by the simulation results. Finally, the performance of a 1920W experimental circuit is verified by experiments.