A Study on Processor Design and Visual Debugger

• Main Authors: Wei-Hong Ruan, 阮偉紘
• Other Authors: Wing-Kwong Wong
• Format: Others
• Language: zh-TW
• Published: 2017
• Online Access: http://ndltd.ncl.edu.tw/handle/26ak5g

碩士 === 國立雲林科技大學 === 電子工程系 === 105 === 　　This thesis reports a study on the implementation of the Y86 architecture and the design of a visual debugger of the programs running on a Y86 softcore. In this study, a Y86 softcore is implemented with Verilog and runs on a development board DE1-SOC. Any Y86 program can run on the board pre-loaded with a Y86 softcore. With the visual debugger, any program running on the Y86 softcore will generate an animation of the data moving through the circuits of the softcore on a VGA device. From the animation, bugs in the executed program could be found visually by the programmer.